Programmability of the Si5350 is via pin control, while the Si5351 is programmable via an I 2 C interface.
An output can be switched between output frequencies without glitches, critical for use with audio DACs during sampling-rate changes (that “popping” sound), for example. With the clock ICs, a proprietary phase-error cancellation circuit minimizes jitter to under 100 ps, and an (optional) spread spectrum function can be invoked for each output to spread EMI and reduce regulatory concerns (-0.1 to -2.5% down ☐.1 to ☑.5% center). The ICs can simultaneously provide free-running clocks using a crystal input as well as clocks sync'ed to a reference clock or an analog control-voltage input. By producing so many frequencies within one IC and with no PLL “farm”, the bill of materials, footprint, and cost are significantly reduced, while power dissipation is cut as well. They target consumer applications which require a plethora of clocks: DVRs, HDTV, gaming consoles, set-top boxes, printers, projectors, blade servers, RAID systems, and femtocell/premise telecom systems.
The ICs can develop any combination of eight non-related frequencies from 8 kHz to 133 MHz with 0 ppm frequency error. They do this by integrating the clock synthesis in the clock's output-divider stage rather than the PLL, thus eliminating the need for eight PLLS while providing equivalent clock synthesis capability. Unlike conventional designs which require a separate phase lock loop (PLL) to synthesize output frequencies with non-integer-related outputs, these ICs can synthesize a unique frequency on each output. The CMOS Si5350 and Si5351 CMOS ICs from Silicon Laboratories aim to change that situation, by providing octal clock generators with on-chip voltage-controlled crystal oscillators (VXCOs) to synthesize a unique frequency on each output. Clock signals for your system: you can never have enough of them, or if you do, they aren't quite the right ones or don’t have the glitch or jitter performance you need.
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